As various electronic components such as DRAMS have increased in memory cell density, designers face a continuous challenge to provide contact openings to predetermined node locations, and to the top surface of conductive lines.
Heretofore, so-called self-aligned contact openings are provided to node locations which are adjacent to wordlines, by first encapsulating the wordline in nitride spacers, and providing a nitride cap thereover. Once this is achieved, a silicon dioxide layer in the form of BPSG, is provided over the encapsulated wordline. Following the provision of the layer of BPSG, the contact opening is etched. In view of perceived shortcomings in the prior art techniques, the patterning and etching of the contact openings through the layer of BPSG to the node location, can be somewhat misaligned. To address this problem, an etching chemistry is provided which is selective to nitride and therefore the etching will stop on the nitride material which encapsulates the wordline.
In addition to the foregoing, the fabrication of certain electronic components may require that contact openings be made to both the top surface of the respective wordlines and to substrate areas adjacent thereto. To make electrical contact to the top surface of wordlines, the prior art techniques have typically included separate photo patterning, and etching steps. The present method provides a convenient means by which contact openings to the top surface of the wordline, and adjacent node location can be provided in a single photo masking and etching step.